Partial Triple Modular Redundancy (pTMR) Selection Method for Circuit Reliability Improvement ID: 2013-034

An innovative method for enhancing integrated circuit reliability by selectively applying Triple Modular Redundancy on critical circuit areas.

Technology Overview

This technology presents a novel approach to improving the reliability of integrated circuits, particularly FPGA circuits, by selectively triplicating the most crucial parts of a circuit. Developed by Brigham Young University with funding from Cisco Systems, this method leverages Partial Triple Modular Redundancy (pTMR) to optimize circuit reliability without the need for exhaustive resources. It stands out by automatically identifying significant circuit structures for triplication, a capability not offered by existing tools and methods.

Key Advantages

• Optimizes circuit reliability with limited resources by focusing on critical areas
• Automatically identifies key circuit structures for triplication, enhancing efficiency
• Developed in collaboration with industry leaders, ensuring practical applicability and relevance
• Offers a significant improvement over existing methods which lack effective selection mechanisms for circuit triplication

Problems Addressed

• Improves circuit reliability without the need for comprehensive triplication, saving resources
• Addresses the lack of effective mechanisms for identifying crucial circuit parts for triplication in existing technologies
• Reduces the complexity and cost associated with enhancing integrated circuit reliability

Market Applications

• Integrated circuit design and optimization, particularly for FPGA circuits
• Reliability enhancement solutions for electronics manufacturers
• Advanced research and development in electrical engineering and computer science
• Potential for adoption in critical systems requiring high reliability, such as aerospace and medical devices

Additional Information

Technology ID: 2013-034
Sell Sheet: Download the Sell Sheet here
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Date Published: 13 May, 2025